Standard Cell and Research Tapeout Engineer

What you will do

Imec is looking for an engineer in physical design, standard cell development, and layout automation. The candidate should understand the layout design flow and contribute to standard cell design research and enablement, while supporting imec tapeout activities across advanced logic technologies.

You will work within the Digital Design, Design Layout, Automation, and PDK teams, with a focus on bridging research-oriented cell design with design-to-tapeout flows.

Standard Cell Design & Research

• Contribute to the exploration, design, and optimization of standard cell architectures for advanced technology nodes.
• Support DTCO-driven cell design and evaluate layout trade-offs (area, performance, design rules).
• Collaborate with design and process teams to align cell design with evolving technology constraints.

PCell Development & Layout Automation

• Develop and maintain PCell generators using Cadence SKILL for standard cells and building blocks.
• Develop Python-based PCells in KLayout for research and rapid prototyping use cases.
• Build reusable layout automation frameworks to support standard cell and block-level design.

Tapeout & Design Support

•  Support imec design tapeout activities, including layout development, verification, and debugging.
• Work on test chip layout integration for standard cell-based designs.
• Ensure designs meet DRC/LVS/PEX requirements using tools such as Calibre, ICV, or equivalent.

Design Automation & Verification

•  Develop scripts and methodologies to improve layout generation, validation, and scalability.
• Contribute to PDK development, including DRC/LVS rule decks and enablement for cell-based design flows.
• Analyze and optimize physical design flows for advanced logic, memory, and emerging technologies.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits. 

Who you are

• You have a demonstrated background in physical design and layout engineering.
• You have experience with Cadence tools and layout environments.
• You have experience with SKILL programming for PCells.
• You have experience with Python scripting (preferably KLayout).
• You have understanding of CMOS VLSI design and physical design flows.
• You are familiar with DRC, LVS, and PEX methodologies.
• You have experience with UNIX/Linux and scripting (TCL, PERL, or similar).
• You have demonstrated analytical, problem-solving, and teamwork skills.